Ultra-High-Speed and Low-Power SOI CMOS Technology with Body-Tied Hybrid Trench Isolation Structure | 東京工業大学附属図書館文献データベース

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Ultra-High-Speed and Low-Power SOI CMOS Technology with Body-Tied Hybrid Trench Isolation Structure

著者名:

さらに 4 件

掲載資料名:

Dielectrics for nanosystems: materials science, processing, reliability, and manufacturing : proceedings of the First international symposium

シリーズ名:

Electrochemical Society Proceedings Series

シリーズ巻号:

2004-04

発行年:

2004

開始ページ:

60

終了ページ:

64

総ページ数:

5

出版情報:

Pennington, N.J.: Electrochemical Society

ISSN:

01616374

ISBN:

9781566774178 [1566774179]

言語:

英語

請求記号:

E23400/200404

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00015394
シリーズID:	PA00000028
会議名:	International Symposium on Dielectrics for Nanosystems ; Meeting of the Electrochemical Society
回次:	1st ; 206th
会議開催地:	Honolulu, Hawaii, USA
会議開催年:	2004.10.03-2004.10.08

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2 国際会議録 Direct Observation of Floating Body Effect in SOI MOS FET Using Nuclear Microprobe Thkai, M, Nakayama, N, Takaoka, H, Iwamatsu, T, Yamaguchi, Y, Maegawa, S, Nishimura, T, Horino, A Kinomura andY Electrochemical Society	8 国際会議録 60-nm gate length SOI CMOS technology optimised for 'System-on-a-SOI-chip' solution Imai, K., Maruyama, S., Suzuld, T., Kudo, T., Miyake, S., Ikeda, M., Abe, T., Masuda, S., Tanabe, A., Lee, J-W., … Electrochemical Society
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