Study of ELS technology for random logic LSI toward 32-nm node

Study of ELS technology for random logic LSI toward 32-nm node

著者名:

Y. Setta ( Fujitsu, Ltd., Japan )
K. Morishita ( Fujitsu VLSI, Ltd., Japan )
K. Kobayashi ( Fujitsu, Ltd., Japan )
T. Chijimatsu ( Fujitsu, Ltd., Japan )
S. Asai ( Fujitsu, Ltd., Japan )

掲載資料名:

Optical Microlithography XXI

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

6924

発行年:

2008

巻:

2

開始ページ:

692423-1

終了ページ:

692423-8

総ページ数:

8

出版情報:

Bellingham, Wash.: Society of Photo-optical Instrumentation Engineers

ISSN:

0277786X

ISBN:

9780819471093 [0819471097]

言語:

英語

請求記号:

P63600/6924

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00052555
シリーズID:	PA00000029
会議名:	SPIE Advanced Lithography : Optical Microlithography
回次:	2008 : 21st
会議開催地:	San Jose, California, USA
会議開催年:	2008.02.26-2008.02.29
論文注記:	Optical Microlithography XXI, 26-29 February 2008, San Jose, California, USA. Poster Session: Double Masking, 692423, 6924-74

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