Impact of line-width roughness on Intel's 65-nm process devices
- 著者名:
- M. Chandhok ( Intel Corp. (USA) )
- S. Datta ( Intel Corp. (USA) )
- D. Lionberger ( Intel Corp. (USA) )
- S. Vesecky ( Intel Corp. (USA) )
- 掲載資料名:
- Advances in resist materials and processing technology XXIV
- シリーズ名:
- Proceedings of SPIE - the International Society for Optical Engineering
- シリーズ巻号:
- 6519
- 発行年:
- 2007
- 出版情報:
- Bellingham, Wash.: SPIE - The International Society of Optical Engineering
- ISSN:
- 0277786X
- ISBN:
- 9780819466389 [0819466387]
- 言語:
- 英語
- 請求記号:
- P63600/6519
- 資料種別:
- 国際会議録
類似資料:
SPIE-The International Society for Optical Engineering |
7
国際会議録
Process, design and optical proximity correction requirements for the 65nm device generation
SPIE-The International Society for Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE-The International Society for Optical Engineering |
4
国際会議録
Effect of line-edge roughness (LER) and line-width roughness (LWR) on sub-100-nm device performance
SPIE - The International Society of Optical Engineering |
SPIE-The International Society for Optical Engineering |
SPIE - The International Society of Optical Engineering |
Electrochemical Society |
6
国際会議録
Process, design, and optical proximity correction requirements for the 65-nm device generation
SPIE-The International Society for Optical Engineering |
SPIE - The International Society of Optical Engineering |