Process Integration of Highly Stable 1.25um2 6T-SRAM Cell with 45 nm Gate Length Triple Gate Transistors
- 著者名:
Lee, K. Yang, J. -H. Maeda, S. Jin, Y.- S. Choi, J. -A. Bae, S. -G. Kim, Y. -H. Ahn, J. -H. Sun, M. -C. Ku, J. -H. Rhee, H. -S. You, Y. -S. Kim, J. -Y. Nam, B. -Y. Kang, C. -J. - 掲載資料名:
- Dielectrics for nanosystems: materials science, processing, reliability, and manufacturing : proceedings of the First international symposium
- シリーズ名:
- Electrochemical Society Proceedings Series
- シリーズ巻号:
- 2004-04
- 発行年:
- 2004
- 開始ページ:
- 16
- 終了ページ:
- 31
- 総ページ数:
- 16
- 出版情報:
- Pennington, N.J.: Electrochemical Society
- ISSN:
- 01616374
- ISBN:
- 9781566774178 [1566774179]
- 言語:
- 英語
- 請求記号:
- E23400/200404
- 資料種別:
- 国際会議録
類似資料:
Society of Photo-optical Instrumentation Engineers |
SPIE - The International Society of Optical Engineering |
2
国際会議録
Performance of immersion lithography for 45-nm-node CMOS and ultra-high density SRAM with 0.25um2
SPIE - The International Society of Optical Engineering | |
SPIE-The International Society for Optical Engineering |
SPIE - The International Society of Optical Engineering |
4
国際会議録
Full-chip application for SRAM gate at 100-nm node and beyond using chromeless phase lithography
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
Society of Photo-optical Instrumentation Engineers |
SPIE - The International Society of Optical Engineering |
SPIE-The International Society for Optical Engineering |
SPIE - The International Society of Optical Engineering |