Increasing post OPC layout verification coverage using a full-chip simulation based verification method

Increasing post OPC layout verification coverage using a full-chip simulation based verification method

著者名:

Hung, C.-Y. ( Semiconductor Manufacturing International Corp. (China) )
Wang, Y. D. ( Synopsys, Inc. (China) )
Deng, Z. X. ( Semiconductor Manufacturing International Corp. (China) )
Gao, G. S. ( Semiconductor Manufacturing International Corp. (China) )
Fan, M. H. ( Synopsys, Inc. (USA) )

掲載資料名:

Advanced microlithography technologies : 8-10 November, 2004, Beijing, China

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

5645

発行年:

2004

開始ページ:

315

終了ページ:

319

総ページ数:

5

出版情報:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819456007 [0819456004]

言語:

英語

請求記号:

P63600/5645

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00014861
シリーズID:	PA00000029
会議名:	Photonics Asia : Advanced microlithography technologies
回次:	2004
会議開催地:	Beijing, China
会議開催年:	2004.11.08-2004.11.10

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