Characterization and Simulation of Lateral Asymmetric Channel Silicon-on-Insulator MOSFETs

Characterization and Simulation of Lateral Asymmetric Channel Silicon-on-Insulator MOSFETs

著者名:

掲載資料名:

Proceedings of the Eleventh International Workshop on the Physics of Semiconductor Devices : (December 11-15, 2001)

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

4746

発行年:

2002

巻:

VOL-1

開始ページ:

644

終了ページ:

648

総ページ数:

5

出版情報:

Bellingham, Wash.: SPIE-The International Society for Optical Engineering

ISSN:

0277786X

ISBN:

9780819445001 [0819445002]

言語:

英語

請求記号:

P63600/4746

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00012582
シリーズID:	PA00000029
会議名:	International Workshop on the Physics of Semiconductor Devices
回次:	2001 : 11th
会議開催地:	Delhi, India
会議開催年:	2001.12.11-2001.12.15

類似資料:

1 国際会議録 Suppression Of Parasitic BJT Action In Single Pocket Thin Film Deep Sub-Micron Soi Mosfets Din, Najeeb-ud, Kumar, Aatish, Dunga, Mohan V., Rao, V. Ramgopal, Vasi, J. Materials Research Society	7 国際会議録 High Field Stressing Effects in JVD Nitride Capacitors ManjulaRani, K.N., Ramgopal Rao, V., Vasi, J. SPIE-The International Society for Optical Engineering
2 国際会議録 Optimization and Realization of Sub 100nm Channel Length Lateral Asymmetric Channel P-MOSFETS Hemkar,M., Vasi,J., Rao,V.Ramgopal, Cheng,B., Woo,J.C.S. SPIE - The International Society for Optical Engineering	8 国際会議録 OFET Sensors with Poly 3-hexylthiophene and Pentacene as Channel Materials for Ionizing Radiation Harshil N. Raval, V. Ramgopal Rao Materials Research Society
3 国際会議録 Alternative Gate Insulators for Deep Sub-Micron Channel Length MOSFETs Rao,V.Ramgopal, Eisele,I., Grabolla,T. SPIE-The International Society for Optical Engineering, Narosa	9 国際会議録 Simulation of Radiation Effects in MOSFETs Ekbote,S., Tambe,D., Zaman,P., Dangat,H.K., Khare,M., Sinha,P., Rodd,S., Bukhanwala,N., Vasi,J., Sharma,D.K., Das,A. SPIE-The International Society for Optical Engineering, Narosa
4 国際会議録 ULSI MOS Transistors with Jet Vapour Deposited(JVD)Silicon Nitride for the Gate Insulator Mahapatra,S., Manjularani,K.N., Rao,V.Ramgopal, Vasi,J. SPIE - The International Society for Optical Engineering	10 国際会議録 Electrically Induced Junction MOSFET For High Performance Sub-50nm CMOS Technology Dixit, Abhisek, Dusane, Rajiv O., Rao, V. Ramgopal Materials Research Society
5 国際会議録 Degradation Study Of Ultra-Thin JVD Silicon Nitride MNSFETs ManjulaRani, K.N., Rao, V. Ramgopal, Vasi, J. Materials Research Society	11 国際会議録 Channel Engineering for Sub-Micron CMOS Technologies Dixit, A., Pal, D.K., Roy, J.N., Ramgopal Rao, V. SPIE-The International Society for Optical Engineering
6 国際会議録 Performance Trade-offs by the use of High-K Gate Dielectrics in Sub 100 nm Channel Length MOSFETs Sharma,Sharad, Rao,V.Ramgopal SPIE - The International Society for Optical Engineering	12 国際会議録 Silicon-On-Insulator (SOI) MOSFET Structure for Sub-50 nm Channel Regime Omura, Y. Electrochemical Society

1

2

3

4

5

6

7

8

9

10

11

12