Malleable architecture generator for FPGA computing

Malleable architecture generator for FPGA computing

著者名:

Gokhale,M. ( David Sarnoff Research Ctr. )
Kaba,J.
Marks,A.
Kim,J.

掲載資料名:

High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

2914

発行年:

1996

開始ページ:

208

終了ページ:

217

出版情報:

Bellingham, Wash.: SPIE-The International Society for Optical Engineering

ISSN:

0277786X

ISBN:

9780819423160 [0819423165]

言語:

英語

請求記号:

P63600/2914

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00017966
シリーズID:	PA00000029
会議名:	Photonics East : High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic
回次:	1996
会議開催地:	Boston, MA, USA
会議開催年:	1996.11.20-1996.11.21

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