Challenges in Nickel Platinum Silicide Wet Etching for Sub-65nm Device Technology

Challenges in Nickel Platinum Silicide Wet Etching for Sub-65nm Device Technology

Author(s):

Publication title:

Cleaning and surface conditioning technology in semiconductor device manufacturing 10

Title of ser.:

ECS transactions

Ser. no.:

11(2)

Pub. Year:

2007

Page(from):

321

Page(to):

326

Pages:

6

Pub. info.:

Pennington, N.J.: Electrochemical Society

ISSN:

19385862

ISBN:

9781566775687 [156677568X]

Language:

English

Call no.:

E23400/11-2

Type:

Conference Proceedings

Details

TDL ID:	ZA00013286
Series ID:	PA00000034
Conf. info. (Name):	ECS Meeting
Conf. info. (Number):	212th
Conf. info. (Venue):	Washington, DC, USA
Conf. info. (Date):	2007.10.07-2007.10.12
Note for article:	212th ECS Meeting, October 7 - October 12, 2007, Washington, DC

Similar Items:

1 Conference Proceedings Titanium silicide etching in sub-half-micron device technology Chooi,S.Y.M., Sih,V.K.T., Siah,S.-Y., Ismail,Z., Zhou,M.-S SPIE-The International Society for Optical Engineering	7 Conference Proceedings Silicides for the 65 nm Technology Node Besser, Payk R., Chan, Simon, Paton, Eric, Kammler, Thorsten, Brown, David, King, Paul, Pressley, Laura Materials Research Society
2 Conference Proceedings Challenges in Sub-Micron Contact Hole Cleaning F. Goh, T. Tjoa, K. Yeo, Z. Ismail Electrochemical Society	8 Conference Proceedings Post-etching polymer removal in sub-half-micron device technology Chooi,S.Y.M., Ismail,Z., Ee,P.-Y., Zhou,M.-S. SPIE-The International Society for Optical Engineering
3 Conference Proceedings Product Level Reliability Challenges for 65 nm Technologies H. Puchner, T. Nigam, K. Manjularani Electrochemical Society	9 Conference Proceedings Process Technologies for Sub-100 nm CMOS Devices* Wakabayashi, H., Ueki, M., Nariliiro, M., Uejima, K., Fukai, T., Togo, M., Yamanioto, T., Takeuchi, K., Ochiai, Y., … Electrochemical Society
4 Conference Proceedings Influence of nitrogen impurities on nickel and platinum silicide formation Ho, K. T., Nicolet, M.-A., Wielu-ski, L. North-Holland	10 Conference Proceedings Application of CPL reticle technology for the 65- and 50-nm node Conley, W., Broeke, D.J.V.D., Socha, R.J., Wu, W., Litt, L.C., Lucas, K., Nelson-Thomas, C.M., Roman, B.J., Chen, F., … SPIE-The International Society for Optical Engineering
5 Conference Proceedings Challenges and Issues in 65nm CMOS Logic Technology W. Lee Electrochemical Society	11 Conference Proceedings Mask challenges and capability development for the 65-nm device technology node: the first status report Kim, W.D., Aquino, C.M., Eickhoff, M.D., Lim, P., Fukuhara, N., Jessen, S.W., Kikuchi, Y., Tanzawa, J. SPIE - The International Society of Optical Engineering
6 Conference Proceedings Nickel SALICIDE Technology for Sub-100 nm CMOS Devices Lu, J.P., Miles, D., Li-Fatou, A., Xu, Y.Q., Zhao, J., Gurba, A., Griffin, A., Jr., Hornug, B., Hewson, M., Grider, T., … Electrochemical Society	12 Conference Proceedings Optimized Nickel Silicide Formation Process for High Performance Sub-65nm CMOS Nodes Froment, B., Carron, V. Electrochemical Society

1

2

3

4

5

6

7

8

9

10

11

12