Partitioning and characterization of high speed adder structures in deep-submicron technologies

Partitioning and characterization of high speed adder structures in deep-submicron technologies

Author(s):

A. Estrada ( Univ. de Sevilla (Spain) )
G. Sassaw ( Univ. de Sevilla (Spain) )
C. J. Jimenez ( Univ. de Sevilla (Spain) )
M. Valencia ( Univ. de Sevilla (Spain) )

Publication title:

VLSI circuits and systems III : 2-4 May 2007, Maspalomas, Gran Canaria, Spain

Title of ser.:

Proceedings of SPIE - the International Society for Optical Engineering

Ser. no.:

6590

Pub. Year:

2007

Pub. info.:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819467188 [0819467189]

Language:

English

Call no.:

P63600/6590

Type:

Conference Proceedings

Details

TDL ID:	ZA00046897
Series ID:	PA00000029
Conf. info. (Name):	Microtechnologies for the New Millennium : VLSI Circuits and Systems
Conf. info. (Number):	2007 : 3rd
Conf. info. (Venue):	Maspalomas, Gran Canaria, Spain
Conf. info. (Date):	2007.05.02-2007.05.04

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