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8 Characterization of Ultra-Shallow Implanted P+ Layer on P-Type Silicon Substrates after Flash Anneal and Conventional Rapid Thermal Anneal

Author(s):
Publication title:
Advanced gate stack, source/drain and channel engineering for Si-based CMOS, new materials, processes, and equipment : proceedings of the international symposium
Title of ser.:
Electrochemical Society Proceedings Series
Ser. no.:
2005-05
Pub. Year:
2005
Page(from):
68
Page(to):
75
Pages:
8
Pub. info.:
Pennington, NJ: Electrochemical Society
ISSN:
01616374
ISBN:
9781566774635 [1566774632]
Language:
English
Call no.:
E23400/200505
Type:
Conference Proceedings

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