Investigating a lithography strategy for diagonal routing architecture at sub-100nm technology nodes
- Author(s):
Li, S. ( Cadence Design Systems, Inc. (USA) ) Chen, T. ( ASML MaskTools, Inc. (USA) ) Shah, S. ( Cadence Design Systems, Inc. (USA) ) Joshi, K. ( Cadence Design Systems, Inc. (USA) ) Thumaty, K. ( Cadence Design Systems, Inc. (USA) ) Arora, N. ( Cadence Design Systems, Inc. (USA) ) - Publication title:
- Design and process integration for microelectronic manufacturing III : 3-4 March 2005, San Jose, California, USA
- Title of ser.:
- Proceedings of SPIE - the International Society for Optical Engineering
- Ser. no.:
- 5756
- Pub. Year:
- 2005
- Page(from):
- 368
- Page(to):
- 377
- Pages:
- 10
- Pub. info.:
- Bellingham, Wash.: SPIE - The International Society of Optical Engineering
- ISSN:
- 0277786X
- ISBN:
- 9780819457363 [0819457361]
- Language:
- English
- Call no.:
- P63600/5756
- Type:
- Conference Proceedings
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