The Gate Stack/Shallow Junction Challenge for Sub-100 nm Technology Generations *

The Gate Stack/Shallow Junction Challenge for Sub-100 nm Technology Generations *

Author(s):

Publication title:

ULSI Process Integration : proceedings of the International Symposium

Title of ser.:

Electrochemical Society Proceedings Series

Ser. no.:

2001-2

Pub. Year:

2001

Page(from):

223

Page(to):

249

Pages:

27

Pub. info.:

Pennington, N.J.: Electrochemical Society

ISSN:

01616374

ISBN:

9781566773089 [1566773083]

Language:

English

Call no.:

E23400/2001-2

Type:

Conference Proceedings

Details

TDL ID:	ZA00014006
Series ID:	PA00000028
Conf. info. (Name):	International Symposium on ULSI Process Integration ; Meeting of the Electrochemical Society
Conf. info. (Number):	2nd ; 199th
Conf. info. (Venue):	Washington, D.C., USA
Conf. info. (Date):	2001.03.24-2001.03.31

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