Yield-enhanced layout generation by new design for manufacturability (DfM) flow
- Author(s):
Kotani, T. ( Toshiba Corp. (Japan) ) Tanaka, S. ( Toshiba Corp. (Japan) ) Nojima, S. ( Toshiba Corp. (Japan) ) Hashimoto, K. ( Toshiba Corp. (Japan) ) Inoue, S. ( Toshiba Corp. (Japan) ) Mori, I. ( Toshiba Corp. (Japan) ) - Publication title:
- Design and process integration for microelectronic manufacturing II [sic] : 26-27 February 2004, Santa Clara, California, USA
- Title of ser.:
- Proceedings of SPIE - the International Society for Optical Engineering
- Ser. no.:
- 5379
- Pub. Year:
- 2004
- Page(from):
- 128
- Page(to):
- 138
- Pages:
- 11
- Pub. info.:
- Bellingham, Wash., USA: SPIE - The International Society of Optical Engineering
- ISSN:
- 0277786X
- ISBN:
- 9780819452924 [0819452920]
- Language:
- English
- Call no.:
- P63600/5379
- Type:
- Conference Proceedings
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