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A methodology to analyze circuit impact of process-related MOSFET geometry

Author(s):
Balasinski, A. ( Cypress Semiconductor Corp. (USA) )  
Publication title:
Design and process integration for microelectronic manufacturing II [sic] : 26-27 February 2004, Santa Clara, California, USA
Title of ser.:
Proceedings of SPIE - the International Society for Optical Engineering
Ser. no.:
5379
Pub. Year:
2004
Page(from):
85
Page(to):
92
Pages:
8
Pub. info.:
Bellingham, Wash., USA: SPIE - The International Society of Optical Engineering
ISSN:
0277786X
ISBN:
9780819452924 [0819452920]
Language:
English
Call no.:
P63600/5379
Type:
Conference Proceedings

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