OPC accuracy and process window verification methodology for sub-100-nm node

OPC accuracy and process window verification methodology for sub-100-nm node

Author(s):

Yang, H. ( Hynix Semiconductor, Inc. (South Korea) )

Park, C. ( Hynix Semiconductor, Inc. (South Korea) )

Hong, J. ( Hynix Semiconductor, Inc. (South Korea) )

Jeong, G. ( Hynix Semiconductor, Inc. (South Korea) )

Cho, B. ( Hynix Semiconductor, Inc. (South Korea) )

Choi, J. ( Hynix Semiconductor, Inc. (South Korea) )

Kang, C. ( Hynix Semiconductor, Inc. (South Korea) )

Yang, K. ( Hynix Semiconductor, Inc. (South Korea) )

Kang, E. ( Hynix Semiconductor, Inc. (South Korea) )

Ji, S. ( Hynix Semiconductor, Inc. (South Korea) )

Yim, D. ( Hynix Semiconductor, Inc. (South Korea) )

Song, Y. ( Hynix Semiconductor, Inc. (South Korea) )

7 more

Publication title:

Metrology, Inspection, and Process Control for Microlithography XVIII

Title of ser.:

Proceedings of SPIE - the International Society for Optical Engineering

Ser. no.:

5375

Pub. Year:

2004

Page(from):

437

Page(to):

443

Pages:

7

Pub. info.:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819452887 [0819452882]

Language:

English

Call no.:

P63600/5375.1

Type:

Conference Proceedings

Details

TDL ID:	ZA00013723
Series ID:	PA00000029
Conf. info. (Name):	SPIE Advanced Lithography : Metrology, Inspection, and Process Control for Microlithography
Conf. info. (Number):	2004 : 18th
Conf. info. (Venue):	Santa Clara, CA, USA
Conf. info. (Date):	2004.02.23-2004.02.26

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