Manufacturing concerns for advanced CMOS circuit realization EBDW alternative solution for cost and cycle time reductions

Manufacturing concerns for advanced CMOS circuit realization EBDW alternative solution for cost and cycle time reductions

Author(s):

Pain, L. ( CEA-LETI (France) )

Jurdit, M. ( CEA-LETI (France) )

LaPlanche, Y.T. ( STMicroelectronics (France) )

Todeschini, J. ( Philips Semiconductors (France) )

Manakli, S. ( STMicroelectronics (France) )

Bervin, G. ( Motorola, Inc. (France) )

Palla, R. ( STMicroelectronics (France) )

Beverina, A. ( STMicroelectronics (France) )

Faure, R. ( STMicroelectronics (France) )

Bossy, X. ( STMicroelectronics (France) )

Leininger, H. ( STMicroelectronics (France) )

Tourniol, S. ( STMicroelectronics (France) )

Broekaart, M. ( Philips Semiconductors (France) )

Judong, F. ( STMicroelectronics (France) )

Brosselin, K. ( STMicroelectronics (France) )

Gouraud, P. ( STMicroelectronics (France) )

De Jonghe, V. ( Philips Semiconductors (France) )

Henry, D. ( STMicroelectronics (France) )

Woo, M. ( Motorola, Inc. (France) )

Stolk, P. ( Philips Semiconductors (France) )

Tavel, B. ( Philips Semiconductors (France) )

Arnaud, F. ( STMicroelectronics (France) )

17 more

Publication title:

Emerging Lithographic Technologies VIII

Title of ser.:

Proceedings of SPIE - the International Society for Optical Engineering

Ser. no.:

5374

Pub. Year:

2004

Page(from):

590

Page(to):

600

Pages:

11

Pub. info.:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819452870 [0819452874]

Language:

English

Call no.:

P63600/5374.2

Type:

Conference Proceedings

Details

TDL ID:	ZA00013722
Series ID:	PA00000029
Conf. info. (Name):	SPIE Advanced Lithography : Emerging Lithographic Technologies
Conf. info. (Number):	2004 : 8th
Conf. info. (Venue):	Santa Clara, CA, USA
Conf. info. (Date):	2004.02.24-2004.02.26

Similar Items:

1 Conference Proceedings Advanced patterning studies using shaped e-beam lithography for 65-nm CMOS preproduction Pain, L., Charpin, M., Laplanche, Y., Herisson, D., Todeschini, J., Palla, R., Beverina, A., Leininger, H., Tourniol, … SPIE-The International Society for Optical Engineering	7 Conference Proceedings Resist component leaching in 193-nm immersion lithography Chapon, J.-D., Chaton, C., Gouraud, P., Broekaart, M., Warrick, S., Guilmeau, I., Trauiller, Y., Belledent, J. SPIE - The International Society of Optical Engineering
2 Conference Proceedings Mix and match capability of e-beam direct-write for the 65-nm technology Laplanche, Y., Charpin, M., Pain, L., Todeschini, J., Henry, D., Sassoulas, P.-O., Gough, S., Weidenmueller, U., … SPIE-The International Society for Optical Engineering	8 Conference Proceedings Comparison between organic spin-on BARC and carbon-containing CVD stack for 65-nm gate patterning Jean-Damien Chapon, Catherine Chaton, Pascal Gouraud, Marcel Broekaart, Scott Warrick, Isabelle Guilmeau, Yorick … SPIE - The International Society of Optical Engineering
3 Conference Proceedings Shaped e-beam lithography integration work for advanced ASIC manufacturing: progress report Pain, L., Charpin, M., Laplanche, Y., Henry, D. SPIE-The International Society for Optical Engineering	9 Conference Proceedings Process control for 45 nm CMOS logic gate patterning B. Le Gratiet, P. Gouraud, E. Aparicio, L. Babaud, K. Dabertrand Society of Photo-optical Instrumentation Engineers
4 Conference Proceedings Mobility Enhancement by Strained Nitride Liners for 65nm CMOS Logic Design Features Claude Ortolland, Pierre Morin, Franck Arnaud, Stephane Orain, Chandra Reddy, Catherine Chaton, Peter Stolk Materials Research Society	10 Conference Proceedings Electron beam lithography simulation based on a single convolution approach: application for sub-45nm nodes J. C. L. denmat, S. Manakli, B. Icard, C. Soonekindt, B. Minghetti, O. L. borgne, L. Pain SPIE - The International Society of Optical Engineering
5 Conference Proceedings Negative-tone CAR resists for e-beam lithography: modification of chemical composition for R&D application ( high resolution ) or production application ( high … Charpin, M., Pain, L., Tedesco, S.V., Gourgon, C., Andrei, A., Henry, D., LaPlanche, Y., Hanawa, R., Kusumoto, T., … SPIE-The International Society for Optical Engineering	11 Conference Proceedings CMOS CFA database under varying illumination for benchmarking of face detection algorithms Bocchio, S., Beverina, F., Rosti, A., Castelli, L., Dominelli, S. SPIE - The International Society of Optical Engineering
6 Conference Proceedings Digital CMOS active pixel image sensor for multimedia applications Zhou,Z., Pain,B., Woo,J.C.S., Fossum,E.R. SPIE-The International Society for Optical Engineering	12 Conference Proceedings Gate Dielectric Impact for the 65nm Digital and Mixed Signal Platform Applications Tavel, B. Electrochemical Society

1

2

3

4

5

6

7

8

9

10

11

12