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Use of silicon-versus-layout verification (SiVL) in process control of wafer lithography and mask-making metrology

Author(s):
Publication title:
Metrology, Inspection, and Process Control for Microlithography XVII
Title of ser.:
Proceedings of SPIE - the International Society for Optical Engineering
Ser. no.:
5038
Pub. Year:
2003
Vol.:
2
Page(from):
1019
Page(to):
1025
Pages:
7
Pub. info.:
Bellingham, WA: SPIE-The International Society for Optical Engineering
ISSN:
0277786X
ISBN:
9780819448439 [0819448435]
Language:
English
Call no.:
P63600/5038
Type:
Conference Proceedings

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