Optimization of side gate length and side gate voltage for sub-100-nm double-gate MOSFET

Optimization of side gate length and side gate voltage for sub-100-nm double-gate MOSFET

Author(s):

Kim, J.-H. ( Kunsan National Univ. (South Korea) )
Kim, G.-H.
Ko, S.-W.
Jung, H.-K.

Publication title:

Smart structures, devices, and systems : 16-18 December 2002 Melbourne, Australia

Title of ser.:

Proceedings of SPIE - the International Society for Optical Engineering

Ser. no.:

4935

Pub. Year:

2002

Page(from):

308

Page(to):

315

Pages:

8

Pub. info.:

Bellingham, Wash.: SPIE-The International Society for Optical Engineering

ISSN:

0277786X

ISBN:

9780819447302 [0819447307]

Language:

English

Call no.:

P63600/4935

Type:

Conference Proceedings

Details

TDL ID:	ZA00012783
Series ID:	PA00000029
Conf. info. (Name):	Smart Materials, Nano-, and Micro- Smart Systems : Smart Structures, Devices, and Systems
Conf. info. (Number):	2002
Conf. info. (Venue):	Melbourne, Australia
Conf. info. (Date):	2002.12.16-2002.12.18

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