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Optimization of i-line resist process for 0.5-ヲフm polysilicon gate structures using a top-coat layer

Author(s):
Publication title:
Advances in resist technology and processing XIII : 11-13 March 1996, San Clara, California
Title of ser.:
Proceedings of SPIE - the International Society for Optical Engineering
Ser. no.:
2724
Pub. Year:
1996
Page(from):
747
Page(to):
753
Pub. info.:
Bellingham, Wash., USA: SPIE-The International Society for Optical Engineering
ISSN:
0277786X
ISBN:
9780819421005 [0819421006]
Language:
English
Call no.:
P63600/2724
Type:
Conference Proceedings

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