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Sub-100-nm and deep sub-100-nm MOS transistor gate patterning

Author(s):
Xiang,Q. ( Advanced Micro Devices,Inc. )
Gupta,S. ( Advanced Micro Devices,Inc. )
Spence,C.A. ( Advanced Micro Devices,Inc. )
Singh,B. ( Advanced Micro Devices,Inc. )
Yeap,G.C.-F. ( Advanced Micro Devices,Inc. )
Lin,M.-R. ( Advanced Micro Devices,Inc. )
1 more
Publication title:
Microelectronic device technology II : 23-24 September, 1998, Santa Clara, California
Title of ser.:
Proceedings of SPIE - the International Society for Optical Engineering
Ser. no.:
3506
Pub. Year:
1998
Page(from):
243
Page(to):
252
Pub. info.:
Bellingham, Washington: SPIE-The International Society for Optical Engineering
ISSN:
0277786X
ISBN:
9780819429650 [0819429651]
Language:
English
Call no.:
P63600/3506
Type:
Conference Proceedings

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