Interface Trap Characterization and Fermi Level Pinning in Si-Passivated Ge/HfO₂ Capacitors

Interface Trap Characterization and Fermi Level Pinning in Si-Passivated Ge/HfO₂ Capacitors

著者名:

掲載資料名:

Physics and technology of high-k gate dielectrics III

シリーズ名:

ECS transactions

シリーズ巻号:

1(5)

発行年:

2006

開始ページ:

27

終了ページ:

32

総ページ数:

6

出版情報:

Pennington, N.J.: Electrochemical Society

ISSN:

19385862

ISBN:

9781566774444 [1566774446]

言語:

英語

請求記号:

E23400/1-5

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00047099
シリーズID:	PA00000034
会議名:	International Symposium on High Dielectric Constant Materials: Materials Science, Processing, Reliability, and Manufacturing Issues
回次:	3rd
会議開催地:	Los Angeles, California, USA
会議開催年:	2005.10.16-2005.10.21

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