Intelligent fill pattern and extraction methodology for sensitive RF/analog or SoC products

Intelligent fill pattern and extraction methodology for sensitive RF/analog or SoC products

著者名:

A. Balasinski ( Cypress Semiconductor (USA) )
J. Cetin ( Cypress Semiconductor (USA) )
A. Kahng ( Blaze DFM, Inc. (USA) and Univ. of California, San Diego (USA) )

掲載資料名:

Design for manufacturability through design-process integration : 28 February-2 March 2007, San Jose, California, USA

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

6521

発行年:

2007

出版情報:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819466402 [0819466409]

言語:

英語

請求記号:

P63600/6521

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00046828
シリーズID:	PA00000029
会議名:	SPIE Advanced Lithography : Design for Manufacturability through Design-Process Integration
回次:	2007
会議開催地:	San Jose, CA, USA
会議開催年:	2007.02.28-2007.03.02

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