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Demonstration of a low-voltage three-transistor-per-pixel CMOS imager based on a pulse-width-modulation readout scheme employed with a one-transistor in-pixel comparator

著者名:
S. Shishido ( Nara Institute of Science and Technology (Japan) )
I. Nagahata ( Nara Institute of Science and Technology (Japan) )
T. Sasaki ( Nara Institute of Science and Technology (Japan) )
K. Kagawa ( Nara Institute of Science and Technology (Japan) )
M. Nunoshita ( Nara Institute of Science and Technology (Japan) )
J. Ohta ( Nara Institute of Science and Technology (Japan) )
さらに 1 件
掲載資料名:
Sensors, cameras, and systems for scientific/industrial applications VIII : 30 January-1 February 2007, San Jose, California, USA
シリーズ名:
Proceedings of SPIE - the International Society for Optical Engineering
シリーズ巻号:
6501
発行年:
2007
出版情報:
Bellingham, Wash.: SPIE - The International Society of Optical Engineering
ISSN:
0277786X
ISBN:
9780819466143 [081946614X]
言語:
英語
請求記号:
P63600/6501
資料種別:
国際会議録

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