On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis

On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis

著者名:

Castro-Lopez, R. ( Instituto de Microelectronica de Sevilla. Ctr. Nacional de Microelectronica (Spain) )
Fernandez, F. V. ( Instituto de Microelectronica de Sevilla. Ctr. Nacional de Microelectronica (Spain) )
Vazquez, A. Rodriguez ( Instituto de Microelectronica de Sevilla. Ctr. Nacional de Microelectronica (Spain) )

掲載資料名:

VLSI Circuits and Systems II

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

5837

発行年:

2005

開始ページ:

661

終了ページ:

672

総ページ数:

12

出版情報:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819458322 [0819458325]

言語:

英語

請求記号:

P63600/5837-2

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00015070
シリーズID:	PA00000029
会議名:	Microtechnologies for the New Millennium : VLSI Circuits and Systems
回次:	2005 : 2nd
会議開催地:	Seville, Spain
会議開催年:	2005.05.09-2005.05.11

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