Improving model-based OPC performance for the 65-nm node through calibration set optimization
- 著者名:
Patterson, K. ( Freescale Semiconductor(France) ) Trouiller, Y. ( CEA-LETI(France) ) Lucas, K. ( Freescale Semiconductor(France) ) Belledent, J. ( Philips Semiconductors(France) ) Borjon, A. ( Philips Semiconductors(France) ) Rody, Y. ( Philips Semiconductors(France) ) Couderc, C. ( Philips Semiconductors(France) ) Sundermann, F. ( STMicroelectronics(France) ) Urbani, J. -C. ( STMicroelectronics(France) ) Baron, S. ( STMicroelectronics(France) ) - 掲載資料名:
- Design and process integration for microelectronic manufacturing III : 3-4 March 2005, San Jose, California, USA
- シリーズ名:
- Proceedings of SPIE - the International Society for Optical Engineering
- シリーズ巻号:
- 5756
- 発行年:
- 2005
- 開始ページ:
- 294
- 終了ページ:
- 301
- 総ページ数:
- 8
- 出版情報:
- Bellingham, Wash.: SPIE - The International Society of Optical Engineering
- ISSN:
- 0277786X
- ISBN:
- 9780819457363 [0819457361]
- 言語:
- 英語
- 請求記号:
- P63600/5756
- 資料種別:
- 国際会議録
類似資料:
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
2
国際会議録
Process window OPC verification: dry versus immersion lithography for the 65 nm node [6154-169]
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |