Formation of NiSi-Silicided p+n Shallow Junctions Using Implant Through Silicide and Low Temperature Furnace Annealing
- 著者名:
- 掲載資料名:
- CMOS front-end materials and process technology : symposium held April 22-24, 2003, San Francisco, California, U.S.A.
- シリーズ名:
- Materials Research Society symposium proceedings
- シリーズ巻号:
- 765
- 発行年:
- 2003
- 開始ページ:
- 235
- 終了ページ:
- 242
- 総ページ数:
- 8
- 出版情報:
- Warrendale, Pa.: Materials Research Society
- ISSN:
- 02729172
- ISBN:
- 9781558997028 [1558997024]
- 言語:
- 英語
- 請求記号:
- M23500/765
- 資料種別:
- 国際会議録
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As AND B ION IMPLANTATION THROUGH Mo AND INTO Mo-SILICIDE LAYERS FOR SHALLOW JUNCTION FORMATION
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