Gate-Source /Drain Extension Overlap Control with Angled Implants: TCAD Modeling Study

Gate-Source /Drain Extension Overlap Control with Angled Implants: TCAD Modeling Study

著者名:

掲載資料名:

Advanced short-time thermal processing for Si-based CMOS devices : proceedings of the international symposium

シリーズ名:

Electrochemical Society Proceedings Series

シリーズ巻号:

2004-01

発行年:

2004

開始ページ:

127

終了ページ:

134

総ページ数:

8

出版情報:

Pennington, NJ: Electrochemical Society

ISSN:

01616374

ISBN:

9781566774062 [1566774063]

言語:

英語

請求記号:

E23400/200401

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00014089
シリーズID:	PA00000028
会議名:	International symposium an advanced short-time thermal processing for Si-based CMOS devices ; Meeting of the Electrochemical Socity
回次:	2nd ; 205th
会議開催地:	San Antonio, TX, USA
会議開催年:	2004.05.10-2004.05.12

類似資料:

1 国際会議録 Optimization of Fluorine Co-Implantation for PMOS Source and Drain Extension Formation for 65 nm Technology Node Graoui, H., Hilkene, M., McComb, B., Castle, M., Felch, S., Cowern, N.E.B., Al-Bayati, A., Tjandra, A., Foad, M.A. Materials Research Society	7 国際会議録 Hydrogenated Poly-Si TFTs with a Structure of Source Overlap and Drain Offset Jang, H.K., Lee, C.E., Noh, S.J. Electrochemical Society
2 国際会議録 Gate Overlapped Lightly Doped Drain Poly-Si TFTs Employing 45° Tilt Implant for Source and Drain Lee, Jae-Hoon, Shin, Moon-Young, Shin, HeeSun, Nam, Woo-Jin, Han, Min-Koo Materials Research Society	8 国際会議録 Saturation Drain Current and Substrate Current Model of Fully Overlapped Lightly Doped Drain MOSFET Kumar, Anil, Kalra, Ekta, Haldar, S., Gupta, R.S. SPIE-The International Society for Optical Engineering
3 国際会議録 10 Device Study of Source/Drain Extension and Halo Formation Using a Single-Wafer, High-Current Implanter Felch, S. B., Food, M. A., Olsen, C., Nouri, F., Matsunaga, Y., Natsuaki, N. Electrochemical Society	9 国際会議録 HIGH-CURRENT AND LOW ACCELERATION VOLTAGE ARSENIC ION IMPLANTED POLYSILICON-GATE AND SOURCE-DRAIN ELECTRODE Si MOS TRANSISTOR Saito, Yasuyuki, Sugimura, Yoshiro, Sugihara, Michiyuki Materials Research Society
4 国際会議録 Optimization of Si:C Source and Drain Formed by Post-Epi Implant and Activation Anneal: Experimental and Theoretical Analysis of Dopant Diffusion and C … Yonah Cho, Victor Moroz, Nikolas Zographos, Sunderraj Thirupapuliyur, Lucien Date, Robert Schreutelkamp Materials Research Society	10 国際会議録 The Role of Residual Source/Drain Implant Damage Traps on SiC MESFET Drain I-V Characteristics Adjaye, J., Mazzola, M.S., Los, A.V. Trans Tech Publications
5 国際会議録 Performance Characteristics of 65nm PFETs Using Molecular Implant Species for Source and Drain Extensions C. F. Tan, L. W. Teo, C-S. Yin, J. G. Lee, J. Liu, A. See, M. S. Zhou, E. Quek, S. Chu, C. Hatem, N. Variam, E. Arevalo, … Materials Research Society	11 国際会議録 Minimization of Drain-to-Gate Interaction in a SiC JFET Inverter Using an External Gate-Source Capacitor O. Berry, Y. Hamieh, S. Raël, F. Meibody-Tabar, S. Vieillard Trans Tech Publications
6 国際会議録 Source/Drain Extension Formed by Impulse Anneal Lefrancois, M.E., Camm, D.M., McCoy, S., Elliott, K. Electrochemical Society	12 国際会議録 a-Si:H TFT : POTENTIAL SUITABILITIES FOR GATE AND SOURCE-DRAIN SELF-ALIGNED STRUCTURE Diem, B., Chenevas-Paule, S. North Holland

1

2

3

4

5

6

7

8

9

10

11

12