Yield-enhanced layout generation by new design for manufacturability (DfM) flow

Yield-enhanced layout generation by new design for manufacturability (DfM) flow

著者名:

Kotani, T. ( Toshiba Corp. (Japan) )

Tanaka, S. ( Toshiba Corp. (Japan) )

Nojima, S. ( Toshiba Corp. (Japan) )

Hashimoto, K. ( Toshiba Corp. (Japan) )

Inoue, S. ( Toshiba Corp. (Japan) )

Mori, I. ( Toshiba Corp. (Japan) )

さらに 1 件

掲載資料名:

Design and process integration for microelectronic manufacturing II [sic] : 26-27 February 2004, Santa Clara, California, USA

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

5379

発行年:

2004

開始ページ:

128

終了ページ:

138

総ページ数:

11

出版情報:

Bellingham, Wash., USA: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819452924 [0819452920]

言語:

英語

請求記号:

P63600/5379

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00013731
シリーズID:	PA00000029
会議名:	SPIE Advanced Lithography : Design and process integration for microelectronic manufacturing
回次:	2004 : 2nd
会議開催地:	Santa Clara, CA, USA
会議開催年:	2004.02.26-2004.02.27

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