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A methodology to analyze circuit impact of process-related MOSFET geometry

著者名:
Balasinski, A. ( Cypress Semiconductor Corp. (USA) )  
掲載資料名:
Design and process integration for microelectronic manufacturing II [sic] : 26-27 February 2004, Santa Clara, California, USA
シリーズ名:
Proceedings of SPIE - the International Society for Optical Engineering
シリーズ巻号:
5379
発行年:
2004
開始ページ:
85
終了ページ:
92
総ページ数:
8
出版情報:
Bellingham, Wash., USA: SPIE - The International Society of Optical Engineering
ISSN:
0277786X
ISBN:
9780819452924 [0819452920]
言語:
英語
請求記号:
P63600/5379
資料種別:
国際会議録

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