Hybrid PPC methodology using multi-step correction and implementation for the sub-100-nm node
- 著者名:
Choi, S.-H. ( Samsung Electronics Co., Ltd. (South Korea) ) Park, J.-S. ( Samsung Electronics Co., Ltd. (South Korea) ) Park, C.-H. ( Samsung Electronics Co., Ltd. (South Korea) ) Chung, W.-Y. ( Samsung Electronics Co., Ltd. (South Korea) ) Kim, I.-S. ( Samsung Electronics Co., Ltd. (South Korea) ) Kim, D.-H. ( Samsung Electronics Co., Ltd. (South Korea) ) Kim, Y.-H. ( Samsung Electronics Co., Ltd. (South Korea) ) Yoo, M.-H. ( Samsung Electronics Co., Ltd. (South Korea) ) Kong, J.-T. ( Samsung Electronics Co., Ltd. (South Korea) ) - 掲載資料名:
- Optical Microlithography XVI
- シリーズ名:
- Proceedings of SPIE - the International Society for Optical Engineering
- シリーズ巻号:
- 5040
- 発行年:
- 2003
- 巻:
- Part Two
- 開始ページ:
- 1176
- 終了ページ:
- 1183
- 総ページ数:
- 8
- 出版情報:
- Bellingham, Wash.: SPIE-The International Society for Optical Engineering
- ISSN:
- 0277786X
- ISBN:
- 9780819448453 [0819448451]
- 言語:
- 英語
- 請求記号:
- P63600/5040
- 資料種別:
- 国際会議録
類似資料:
SPIE-The International Society for Optical Engineering |
7
国際会議録
Full-chip application for SRAM gate at 100-nm node and beyond using chromeless phase lithography
SPIE - The International Society of Optical Engineering |
SPIE-The International Society for Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE-The International Society for Optical Engineering |
SPIE - The International Society of Optical Engineering |
SPIE-The International Society for Optical Engineering |
SPIE-The International Society for Optical Engineering |