TFT threshold voltage adjustment with in-situ doped PVD silicon films

TFT threshold voltage adjustment with in-situ doped PVD silicon films

著者名:

Droes, S.R.T. ( Sharp Labs. of America (USA) )
Atkinson, M.M. ( Sharp Labs. of America (USA) )
Guthrie, P.R. ( Sharp Labs. of America (USA) )
Crowder, M.A. ( Sharp Labs. of America (USA) )
Voutsas, A.T. ( Sharp Labs. of America (USA) )

掲載資料名:

Poly-Silicon Thin Film Transistor Technology and Applications in Displays and Other Novel Technology Areas

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

5004

発行年:

2003

開始ページ:

95

終了ページ:

104

総ページ数:

10

出版情報:

Bellingham, Wash.: SPIE-The International Society for Optical Engineering

ISSN:

0277786X

ISBN:

9780819448040 [0819448044]

言語:

英語

請求記号:

P63600/5004

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00012987
シリーズID:	PA00000029
会議名:	IS&T/SPIE Electronic Imaging : Poly-Silicon Thin Film Transistor Technology and Applications in Displays and Other Novel Technology Areas
回次:	2003
会議開催地:	Santa Clara, CA, USA
会議開催年:	2003.01.21-2003.01.22

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