100-nm CMOS gates patterned with 3ｦﾒbelow 10 nm

100-nm CMOS gates patterned with 3ｦﾒbelow 10 nm

著者名:

Liu,H.Y. ( Hewlett-Packard Labs. )

Diaz,C.H. ( Hewlett-Packard Labs. )

Chi,C. ( Hewlett-Packard Labs. )

Kavari,R. ( Hewlett-Packard Labs. )

Cheng,P. ( Intel Corp. )

Cao,M. ( Hewlett-Packard Labs. )

Gleason,R.E. ( Hewlett-Packard Labs. )

Doyle,B.S. ( Intel Corp. )

Greene,W. ( Hewlett-Packard Labs. )

Ray,G. ( Hewlett-Packard Labs. )

さらに 5 件

掲載資料名:

Emerging lithographic technologies II : 23-25 February 1998, Santa Clara, California

シリーズ名:

Proceedings of SPIE - the International Society for Optical Engineering

シリーズ巻号:

3331

発行年:

1998

開始ページ:

375

終了ページ:

381

出版情報:

Bellingham, Wash., USA: SPIE-The International Society for Optical Engineering

ISSN:

0277786X

ISBN:

9780819427762 [0819427764]

言語:

英語

請求記号:

P63600/3331

資料種別:

国際会議録

詳細

TDL書誌ID:	ZA00019241
シリーズID:	PA00000029
会議名:	SPIE Advanced Lithography : Emerging Lithographic Technologies
回次:	1998 : 2nd
会議開催地:	Santa Clara, CA, USA
会議開催年:	1998.02.23-1998.02.25

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