High and Low Stress Voltage Instabilities in High-K Gate Stacks

High and Low Stress Voltage Instabilities in High-K Gate Stacks

Author(s):

Publication title:

2007 International Conference on Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors (ULSIC vs. TFT)

Title of ser.:

ECS transactions

Ser. no.:

8(1)

Pub. Year:

2007

Page(from):

99

Page(to):

103

Pages:

5

Pub. info.:

Pennington, N.J.: Electrochemical Society

ISSN:

19385862

ISBN:

9781604238921 [1604238925]

Language:

English

Call no.:

E23400/8-1

Type:

Conference Proceedings

Details

TDL ID:	ZA00013287
Series ID:	PA00000034
Conf. info. (Name):	International Conference on Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors
Conf. info. (Number):	2007
Conf. info. (Venue):	Barga, Italy
Conf. info. (Date):	2007.07.28-2007.08.03
Note for article:	2007 International Conference on Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors (ULSIC vs. TFT), July 28 - August 3, 2007, Barga, Italy

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