FPGA chip performance improvement with gate shrink through alternating PSM 9Onm process [5992-182]

FPGA chip performance improvement with gate shrink through alternating PSM 9Onm process [5992-182]

Author(s):

Yu, C. -C.

Shieh, M. -F.

Liu, E.

Lin, B. ( UMC (Taiwan) )

Ho, J.

Wu, X. ( Xilinx Inc. (USA) )

Panaite, P.

Chacko, M.

Zhang, Y.

Lei, W. ( Synopsys Inc. (USA) )

5 more

Publication title:

25th Annual BACUS Symposium on Photomask Technology

Title of ser.:

Proceedings of SPIE - the International Society for Optical Engineering

Ser. no.:

5992

Pub. Year:

2005

Pt.:

2

Page(from):

59925A

Pub. info.:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819460141 [0819460141]

Language:

English

Call no.:

P63600/5992

Type:

Conference Proceedings

Details

TDL ID:	ZA00016029
Series ID:	PA00000029
Conf. info. (Name):	SPIE Photomask Technology : Annual BACUS Symposium on Photomask Technology
Conf. info. (Number):	2005 : 25th
Conf. info. (Venue):	Monterey, California, USA
Conf. info. (Date):	2005.10.04-2005.10.07

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