Bounded budgeted parallel architecture versus control dominated architecture for hazard data-signal processor synthesis

Bounded budgeted parallel architecture versus control dominated architecture for hazard data-signal processor synthesis

Author(s):

Gai, B. Le ( Univ. of South Brittany (France) )
Casseau, E. ( Univ. of South Brittany (France) )
Martin, E. ( Univ. of South Brittany (France) )

Publication title:

VLSI Circuits and Systems II

Title of ser.:

Proceedings of SPIE - the International Society for Optical Engineering

Ser. no.:

5837

Pub. Year:

2005

Page(from):

100

Page(to):

111

Pages:

12

Pub. info.:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819458322 [0819458325]

Language:

English

Call no.:

P63600/5837-1

Type:

Conference Proceedings

Details

TDL ID:	ZA00015069
Series ID:	PA00000029
Conf. info. (Name):	Microtechnologies for the New Millennium : VLSI Circuits and Systems
Conf. info. (Number):	2005 : 2nd
Conf. info. (Venue):	Seville, Spain
Conf. info. (Date):	2005.05.09-2005.05.11

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