Challenges in Integrating the High-K Gate Dielectric Film to the Conventional CMOS Process Flow | 東京工業大学附属図書館文献データベース

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Challenges in Integrating the High-K Gate Dielectric Film to the Conventional CMOS Process Flow

Author(s):

Agarwal, Avinash

Freiler, Michael

Perrymore, Loyd

Bergmann, Renate

Bersuker, Gennadi

Murto, Robert W.

Huff, Howard R.

Publication title:

Gate stack and silicide issues in silicon processing II : symposium held April 17-19, 2001, San Francisco, California, U.S.A.

Title of ser.:

Materials Research Society symposium proceedings

Ser. no.:

670

Pub. Year:

2002

Pages:

11

Pub. info.:

Warrendale, PA: Materials Research Society

ISSN:

02729172

ISBN:

9781558996069 [1558996060]

Language:

English

Call no.:

M23500/670

Type:

Conference Proceedings

Details

TDL ID:	ZA00014553
Series ID:	PA00000011
Conf. info. (Name):	Symposium On Gate Stack And Silicide Issues in Silicon Processing
Conf. info. (Number):	2nd
Conf. info. (Venue):	San Francisco, CA, USA
Conf. info. (Date):	2001.04.17-2001.04.19

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