Sub-50-nm isolated line and trench width artifacts for CD metrology

Sub-50-nm isolated line and trench width artifacts for CD metrology

Author(s):

Tortonese, M. ( VLSI Standards, Inc. (USA) )
Lorusso, G. ( KLA-Tencor Corp. (USA) )
Blanquies, R.M. ( VLSI Standards, Inc. (USA) )
Prochazka, J. ( VLSI Standards, Inc. (USA) )
Grella, L. ( KLA-Tencor Corp. (USA) )

Publication title:

Metrology, Inspection, and Process Control for Microlithography XVIII

Title of ser.:

Proceedings of SPIE - the International Society for Optical Engineering

Ser. no.:

5375

Pub. Year:

2004

Page(from):

647

Page(to):

656

Pages:

10

Pub. info.:

Bellingham, Wash.: SPIE - The International Society of Optical Engineering

ISSN:

0277786X

ISBN:

9780819452887 [0819452882]

Language:

English

Call no.:

P63600/5375.1

Type:

Conference Proceedings

Details

TDL ID:	ZA00013723
Series ID:	PA00000029
Conf. info. (Name):	SPIE Advanced Lithography : Metrology, Inspection, and Process Control for Microlithography
Conf. info. (Number):	2004 : 18th
Conf. info. (Venue):	Santa Clara, CA, USA
Conf. info. (Date):	2004.02.23-2004.02.26

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