Mask cost tradeoffs for sub-100-nm technologies: stopping a runaway? (Invited Paper)

Mask cost tradeoffs for sub-100-nm technologies: stopping a runaway? (Invited Paper)

Author(s):: Balasinski, A.P. ( Cypress Semiconductor Corp. (USA) )
Publication title:: Cost and performance in integrated circuit creation : 27-28 February 2003, Santa Clara, California, USA
Title of ser.:: Proceedings of SPIE - the International Society for Optical Engineering
Ser. no.:: 5043
Pub. Year:: 2003
Page(from):: 82
Page(to):: 92
Pages:: 11
Pub. info.:: Bellingham, Wash.: SPIE-The International Society for Optical Engineering
ISSN:: 0277786X
ISBN:: 9780819448484 [0819448486]
Language:: English
Call no.:: P63600/5043
Type:: Conference Proceedings

Details

TDL ID:	ZA00013034
Series ID:	PA00000029
Conf. info. (Name):	Microelectronic Manufacturing : Cost and performance in integrated circuit creation
Conf. info. (Number):	2003
Conf. info. (Venue):	Santa Clara, CA, USA
Conf. info. (Date):	2003.02.27-2003.02.28

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