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Lithography-driven layout of logic cells for 65-nm node

Author(s):
Publication title:
Design and process integration for microelectronic manufacturing II : 26-28 February 2003, Santa Clara, California, USA
Title of ser.:
Proceedings of SPIE - the International Society for Optical Engineering
Ser. no.:
5042
Pub. Year:
2003
Page(from):
126
Page(to):
134
Pages:
9
Pub. info.:
Bellingham, Wash.: SPIE-The International Society for Optical Engineering
ISSN:
0277786X
ISBN:
9780819448477 [0819448478]
Language:
English
Call no.:
P63600/5042
Type:
Conference Proceedings

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