Advanced procedure to evaluate process performance at very low k1 based on device parameters linked to lithography and process data: ?. Verification of cell layout based on integration of optical and electrical simulations
- Author(s):
- Balasinski,A. ( Cypress Semiconductor )
- Iandolo,W.
- Joshi,D.
- Karklin,L.
- Axelrad,V.
- Publication title:
- Optical Microlithography XIV
- Title of ser.:
- Proceedings of SPIE - the International Society for Optical Engineering
- Ser. no.:
- 4346
- Pub. Year:
- 2001
- Vol.:
- 4346
- Pt.:
- Two of Two Parts
- Page(from):
- 1514
- Page(to):
- 1521
- Pages:
- 8
- Pub. info.:
- Bellingham, Wash.: SPIE-The International Society for Optical Engineering
- ISSN:
- 0277786X
- ISBN:
- 9780819440327 [0819440329]
- Language:
- English
- Call no.:
- P63600/4346
- Type:
- Conference Proceedings
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