Blank Cover Image

Automatic gate CD control for a full-chip-scale SRAM device

Author(s):
  • Park,C.-H. ( Samsung Electronics Co.,Ltd. (Korea) )
  • Kim,T.-K. ( Samsung Electronics Co.,Ltd. (Korea) )
  • Lee.H.-J ( Samsung Electronics Co.,Ltd. (Korea) )
  • Kong.J.-T ( Samsung Electronics Co.,Ltd. (Korea) )
  • Lee.S.-H ( Samsung Electronics Co.,Ltd. (Korea) )
Publication title:
17th Annual BACUS Symposium on Photomask Technology and Management
Title of ser.:
Proceedings of SPIE - the International Society for Optical Engineering
Ser. no.:
3236
Pub. Year:
1998
Page(from):
350
Page(to):
357
Pub. info.:
Bellingham, Wash.: SPIE-The International Society for Optical Engineering
ISSN:
0277786X
ISBN:
9780819426697 [0819426695]
Language:
English
Call no.:
P63600/3236
Type:
Conference Proceedings

Similar Items:

1 Conference Proceedings Practical approach to control the full-chip-level gate CD in DUV lithography

Park,C.-H., Kim,Y.-H., Lee,H.-J., Kong,J.-T., Lee,S.-H.

SPIE-The International Society for Optical Engineering
7 Conference Proceedings Gate CD control for full chip using total-process-proximity-based correction method

Nam,B.H., Park,J.O., Lee,D.J., Cheong,J.H., Hwang,Y.J., Song,Y.J.

SPIE - The International Society for Optical Engineering
2 Conference Proceedings Accurate gate CD control through the full-chip area using the dual model in the model-based OPC

Hong, J.-S., Park, C.-H., Kim, D.-H., Choi, S.-H., Ban, Y.-C., Kim, Y.-H., Yoo, M.-H., Kong, J.-T.

SPIE - The International Society of Optical Engineering
8 Conference Proceedings Printing 95-nm DRAM full chip patterns in KrF lithography

Kim, S.-K., Kim, J.-S., Yoo, T.-J., Kong, K.-K., Yun, H.-S., Kim, Y.-D., Kim, H.-R., Kim, Y.-S., Kim, H.S.

SPIE-The International Society for Optical Engineering
3 Conference Proceedings Full-chip application for SRAM gate at 100-nm node and beyond using chromeless phase lithography

Park, J.-S., Kim, S.-H., Shin, I.-K., Choi, S.-W., Sohn, J.-M., Lee, J.-H., Shin, H.-S., Laidig, T.L., Van den Broeke, …

SPIE - The International Society of Optical Engineering
9 Conference Proceedings Optical proximity correction considering mask manufacturability and its application to 0.25-ｦﾌm DRAM for enhanced device performance

Park,C.-H., Rhie,S.-U., Choi,J.-H., Park,J.-S., Seo,H.-W., Kim,Y.-H., Park,Y.-K., Han,W.-S., Lee,W.-S., Kong,J.-T.

SPIE - The International Society for Optical Engineering
4 Conference Proceedings Systematlc approach to correct critical patterns Induced by the lithography process at the full-chip level

Park,C.-H., Kim,Y.-H., Park,J.-S., Kim,K.-D., Yoo,M.-H., Kong,J.-T.

SPIE - The International Society for Optical Engineering
10 Conference Proceedings CD control at low K1 optical lithography in DRAM device

Hong, J., Woo, C., Park, J., Cho, B., Choi, J.-S., Yang, H., Park, C., Shin, Y.-C., Kim, Y., Jeong, G., Kim, J., Kang, …

SPIE-The International Society for Optical Engineering
5 Conference Proceedings A method for generating assist-features in full-chip scale and its application to contact layers of sub-70nm DRAM devices

D. Park, S. Kim, C. Hwang, S. Lee, H. Cho, J. Moon

SPIE - The International Society of Optical Engineering
11 Conference Proceedings Process Integration of Highly Stable 1.25um2 6T-SRAM Cell with 45 nm Gate Length Triple Gate Transistors

Lee, K., Yang, J. -H., Maeda, S., Jin, Y.- S., Choi, J. -A., Bae, S. -G., Kim, Y. -H., Ahn, J. -H., Sun, M. -C., Ku, J. …

Electrochemical Society
6 Conference Proceedings Double-step process for manufacturing reticle to reduce gate CD variation

Kozuma,M., Komatsu,M., Arakawa,R., Kubo,S., Takahashi,T., Jensen,J., Bang,H.S., Lee,I.H., Shin,C., Kim,H.-S., Park,K.W.

SPIE-The International Society for Optical Engineering
12 Conference Proceedings 157-nm lithography for 65-nm node SRAM-gate

Suganaga, T., Irie, S., Miyoshi, S., Kim, J.-H., Watanabe, K., Kurose, E., Furukawa, T., Hagiwara, T., Ishimaru, T., …

SPIE-The International Society for Optical Engineering
1
 
2
 
3
 
4
 
5
 
6
 
7
 
8
 
9
 
10
 
11
 
12